TaMaRa: Towards a Triple Modular Redundancy Pass for Yosys
Tags
16 pages
Blog
RISC-V Formal Verification Framework Extension for Synopsys VC Formal
Sky130 SPICE, the KiCad way
Logic Locking with Moosic
Solving a Sudoku with SBY and Formal Verification
How I went from blinker to RISC-V in 3 months
First gateware on the Colorlight 5A-75B board
Tillitis and YosysHQ
3D raytraced game with open source C to FPGA toolchain
Logic Primitive Transformations with Yosys Techmap
