The Yosys User’s Group is for anyone who uses Yosys. We present recent updates to the tools, showcase new features and invite our users to present their work.
You can see the minutes of our calls here.
If you’d like to join, then please sign up to the newsletter or follow us on:
# YUG 8 - Using formal to detect information leakage
After a long summer break, our meetings have resumed again! Our last meeting on October 29th had Katharina CeesaySeitz from ETH Zürich present her work on using special netlist transformations in a custom Yosys pass in combination with formal verification to detect microarchitectural information leakage via hardware timing side channels. Watch her talk on our Youtube channel.
# YUG 7 - FPGA lightning talks
6 great presentations about open source FPGA projects! Watch the talks here: https://www.youtube.com/watch?v=wZiocG8DHfE&list=PL-ggbobZGIQuMGBkQgubVbJ1jffe2k18O
Thanks to the presenters: Pat Deegan, Frans Skarman, Martín Heredia, Sasko Simonovski, Christopher Lozinski and Ashe Connor.
# YUG 6 - Hardware Security
Katharina & Flavian from ETH Zurich introduced their tool for Information Flow Tracking: https://comsec.ethz.ch/research/hardware-design-security/cellift/
# YUG 5 - SystemVerilog with Pulp’s SVase
# YUG 4 - all the plugins!
- List of all the plugins we know of
- Gabriel Gouvine talks about how he wrote a logic locking plugin
- Martin Povišer talks about the Python plugin API
# YUG 3 - pick your primitives!
- Show in the case of multipliers how one would go about instructing Yosys to synthesize chosen primitives a specific way.
- https://github.com/povik/yug3_demo
# YUG 2 - introducing EQY!
# YUG 1 - a new users group!
- What people are using Yosys for,
- How things can be improved,
- Introducing our new tools,