Parallel formal proofs, ability to disable VCD dumps, new getting started guide.
SBY logic loop improvements, autotune blogpost.
Autotune helps to find the fastest solver for your properties
Autotuning formal verification engine selection, tribuf blogpost.
Sby now supports trisates in formal proofs
Memory inferencing overhaul.
Formal tristate support, x handling, optimising adders.
Teodor-Dumitru Ene presents his work on adder optimisations for the open source FPGA and ASIC tools
Co-simulation, new options for SBY, YosysHQ team is growing.
Yosys is the defacto synthesis tool for all the open source ASIC flows
