For a long time people have asked us for quality long form content that shows how to get the best from our formal tools.
We have started a series of app notes, with the first being about cover and witness for SVA properties. Otherwise known as ‘Am I testing what I think I’m testing’!
What You will learn in this app note:
- Default clocking and default disable declarations
- Sequences and cycle delays
- Overlapping and non-overlapping implication syntax and semantic
- Weak precondition cover and witness
- How to apply that to a practical HDL code example
Feel free to give us feedback and suggest new topics.